Efficient Strong Simulation of High-level Quantum Gates
Quantum circuit simulation is paramount to the testing and optimization of quantum algorithms, and considerable research efforts have been made towards efficient simulators. While circuits are often expressed in terms of high-level gates that correspond to classical operations like $k$-fold fan-in $\text{AND}_k$ gates, existing simulation methods require compilation to a low-level gate-set before simulation, which increases circuit size and incurs a considerable (typically exponential) overhead.
Here I present a gadget-based simulator which simulates high-level gates directly, thereby avoiding entirely the blowup of compilation. This reduces both the theoretical complexity of simulating circuits containing high-level gates, and the practical running time compared to standard simulators found in IBM’s Qiskit Aer library. My simulator uses a low-rank stabilizer decomposition of the magic state required to simulate non-stabilizer gates, with improvements in the rank directly improving performance. In this context, I also prove a lower bound of $\Omega(t^2 / \log^4 t)$ on the rank of the $\ket{T}^t$ magic state, improving over the existing $\Omega(t)$.
Wed 22 JanDisplayed time zone: Mountain Time (US & Canada) change
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